Video Processing Cores
Scaler and Frame Syncronizer
Field proven scaler IP core that outperforms competitors solutions. It incorporates a detail enhancer and frame synchronizer with low latency and a very small footprint.
Deinterlacer
Broadcast Quality Pixel-based motion adaptive deinterlacer with Auto Video/Film Mode, Low Angle Interpolation, Multi-Cadence detection, and ultra-low latency.
List of All Available IP Cores
| Part Number | Description | Availability |
| CXC-1 | Configurable Up/Down/Cross Converter (system wrapper) | Now |
| CMV-1 | Configurable Multi-Viewer |
Now |
| CMV-4K | Configurable 4K Multi-Viewer | Now |
| VPC-1 | Video Processor and Deinterlacer with Line-Doubled Output | Now |
| VSC-1 | Video Scaler with Shrink and Zoom Support | Now |
| VSC-2 | Video Scaler with Keystone Correction | Contact Us |
| VPC-3 | Mosquito/Block Noise Reducer | Now |
| VPC-4 | Video Rotation Function | Now |
| VPC-5 | Adaptive Detail Enhancer | Now |
| VPC-6 | Linear Frame Rate Converter | Now |
| VSC-4KX | Video Scaler with 4K Up/Down/Cross Conversion | Now |
A Clear Advantage
- Field proven quality already in use by leading broadcast manufacturers
- Robust implementation with all IP cores subjected to continuous randomized testing and checking against a golden C-model
- Easy customization through use of Verilog build-time parameters
- Ability to close timing across a wide range of device families
- Easy to use pre-sales evaluation system ensures low risk of adoption
- Expert technical support to assist with your integration effort
Deliverables
- Synthesizable Verilog RTL source code (encrypted or unencrypted as per license agreement)
- Verilog testbench and verification test suite including bit-accurate C models
- Product documentation and integration guidelines
- Integration and technical support
- Reference designs available for standard FPGA development kits for demonstration and evaluation purposes
